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vs1001k.h

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#ifndef _VS1001K_H_
#define _VS1001K_H_
/*
 * Copyright (C) 2001-2002 by egnite Software GmbH. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this
 *    software must display the following acknowledgement:
 *
 *    This product includes software developed by egnite Software GmbH
 *    and its contributors.
 *
 * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
 * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * For additional information see http://www.ethernut.de/
 *
 * -
 * Portions Copyright (C) 2001 Jesper Hansen <jesperh@telia.com>.
 * 
 * This file is part of the yampp system.
 * 
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * 
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software Foundation,
 * Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 */

/*
 * $Log: vs1001k.h,v $
 * Revision 1.2  2003/01/24 12:01:09  przemko
 * Obciecie dosowych znakow konca lini
 *
 * Revision 1.1.1.1  2002/12/07 07:16:52  marwi
 *
 *
 * Revision 1.4  2002/10/29 15:40:49  harald
 * *** empty log message ***
 *
 * Revision 1.3  2002/08/16 17:51:19  harald
 * First public release
 *
 * Revision 1.2  2002/06/26 17:29:15  harald
 * First pre-release with 2.4 stack
 *
 */

#include <sys/types.h>



/*
 * Serial control interface clock input. The first rising clock 
 * edge after XCS has gone low marks the first bit to be written
 * to the decoder.
 */
#define VS_SCK_PORT     PORTB
#define VS_SCK_DDR      DDRB
#define VS_SCK_BIT      0

#define VS_SS_PORT      PORTB
#define VS_SS_DDR       DDRB
#define VS_SS_BIT       1

/*
 * Serial control interface data input. The decoder samples this 
 * input on the rising edge of SCK if XCS is low.
 */
#define VS_SI_PORT      PORTB
#define VS_SI_DDR       DDRB
#define VS_SI_BIT       2

/*
 * Serial control interface data output. If data is transfered
 * to the decoder, bits are shifted out on the falling SCK edge.
 * If data is transfered from the decoder, SO is at a high 
 * impedance state.
 */
#define VS_SO_DDR       DDRB
#define VS_SO_BIT       3

/*
 * Active low chip select input. A high level forces the serial 
 * interface into standby mode, ending the current operation. 
 * A high level also forces serial output (SO) to high impedance 
 * state.
 */
#define VS_XCS_PORT     PORTB
#define VS_XCS_DDR      DDRB
#define VS_XCS_BIT      4

/*
 * Serial data interface bit sync. The first DCLK sampling edge, 
 * during which BSYNC is high, marks the first bit of a data byte.
 */
#define VS_BSYNC_PORT   PORTB
#define VS_BSYNC_DDR    DDRB
#define VS_BSYNC_BIT    5

#define VS_RESET_PORT   PORTB
#define VS_RESET_DDR    DDRB
#define VS_RESET_BIT    7

/*
 * Data request.
 */
#define VS_DREQ_PORT    PORTE
#define VS_DREQ_PIN     PINE
#define VS_DREQ_DDR     DDRE
#define VS_DREQ_BIT     6

/*
 * Instruction opcodes.
 */
#define VS_OPCODE_READ  3
#define VS_OPCODE_WRITE 2

/*
 * Decoder registers.
 */
#define VS_MODE_REG         0
#define VS_STATUS_REG       1
#define VS_CLOCKF_REG       3
#define VS_DECODE_TIME_REG  4
#define VS_AUDATA_REG       5
#define VS_WRAM_REG         6
#define VS_WRAMADDR_REG     7
#define VS_HDAT0_REG        8
#define VS_HDAT1_REG        9
#define VS_A1ADDR_REG      10
#define VS_VOL_REG         11
#define VS_A1CTRL_REG      13


/*
 * Mode register bits.
 */
#define VS_SM_DIFF      0x0001
#define VS_SM_FFWD      0x0002
#define VS_SM_RESET     0x0004
#define VS_SM_MP12      0x0008
#define VS_SM_PDOWN     0x0010
#define VS_SM_DAC       0x0020
#define VS_SM_DACMONO   0x0040
#define VS_SM_BASS      0x0080
#define VS_SM_DACT      0x0100
#define VS_SM_BYTEORD   0x0200
#define VS_SM_IBMODE    0x0400
#define VS_SM_IBCLK     0x0800


/*
 * Clock register bits.
 */
#define VS_CF_DOUBLER   0x8000


extern int VsPlayerInit(void);
extern int VsPlayerReset(u_short mode);
extern int VsPlayerKick(void);

extern u_char *VsBufferInit(u_short size);
extern u_char *VsBufferReset(void);
extern u_char *VsBufferRequest(u_short *sizep);
extern u_char *VsBufferAcknowledge(u_short nbytes);

extern int VsSetVolume(u_char left, u_char right);
extern int VsBeep(u_char fsin, u_char ms);


#endif

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